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Forum Index : Electronics : Warpspeed’s MOSFET mounting method
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| Warpspeed Guru  Joined: 09/08/2007 Location: AustraliaPosts: 4406 |
Thats a really nice looking circuit board. Well done ! Funnily enough I also did a 1K to 3.3K change myself, although it made no difference to actual operation. Check the data waveforms coming straight out of the eprom, there will be a burst of noise every time the address bits change. The clocked latch should remove all of that. I like to see that the latch actually clocks well after the data chaos has subsided. If you use an eprom faster than about 150nS and high speed (HC) cmos chips, as I expect you already have, it should all be fine. There is no reason why there should be a problem, but just check that everything is squeaky clean and no possibility of occasional noise glitches. Your waveforms all look very nice from what I can see, but its vital there are no occasional glitches. Cheers, Tony. |
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mackoffgrid Guru Joined: 13/03/2017 Location: AustraliaPosts: 460 |
Thanks Tony, that's high praise and appreciated.  Yes, I took note of your various comments and incorporated them. I ensured the eprom was better or equal to 150nS (I think its 120) and all the logic is HC except for the slow or 2nd 4040 . I will investigate further to ensure there are no glitches coming out of the eprom. I am wondering about making a detector to catch glitches etc and logging it, as a proof that all is well. |
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| Warpspeed Guru Joined: 09/08/2007 Location: AustraliaPosts: 4406 |
There should not be any problem, the output latch cleans up the whole show. The rest of it should now be fairly straightforward. If you begin with the largest inverter and get that going first, then successively add the others. Its probably the most logical way to proceed. Cheers, Tony. |
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| kanchana Regular Member  Joined: 08/05/2018 Location: Sri LankaPosts: 56 |
Any updates on this type of cascade inverter ?. Any one tried to program micro or any updates on the built. I am thinking of building a one Regards kanchana |
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| Warpspeed Guru Joined: 09/08/2007 Location: AustraliaPosts: 4406 |
Yes, its still slowly evolving, and the latest effort has advanced a very long way since the original prototype. The original had no provision for voltage regulation, the dc input voltage needed to be held fairly constant, and a decent Lithium battery should be sufficient to do that for most practical purposes. The next obvious step forward was to generate multiple lookup tables. The idea here is that if each step is made very slightly narrower in time, that can decrease the ac output voltage slightly. If you do that, the top step always has the largest decrease, if you keep a proper sine wave shape, with very little or no change down near the zero crossing point. The top step gets narrower and eventually disappears. If you keep going, its possible to generate perhaps 256 different lookup tables over a 2:1 input voltage range that varies the output waveform from 81 steps at minimum voltage (smallest steps) to only 41 steps at maximum voltage (steps twice as high). Each lookup table changes the 230v output only by about half a volt, so the changes between different lookup tables are very small and appear as a very smooth up and down control of output voltage. That can be done in software, and the least painful way for me to do this was to use a dual port ram. The processor calculated all the step timing positions and modified byte by byte a single lookup table in the dual port ram. On the output port side of the ram, the lookup table provided the output switching pattern data for a 1K lookup table with 20uS time resolution for a 20mS sine wave. The output side was just hardware continuously producing a 50Hz sine wave with eight data bits to switch the mosfets. The processor could plod along at its own pace without any timing constraints. My programming skills are very limited so that was a big enough challenge for me. Anyhow it worked great ! I now had a multistep inverter that could voltage regulate over a 2:1 input voltage range and produce a nice clean low distortion sine wave output. I measured 1.0% THD with 81 steps, and 1.7% THD with 41 steps. Another step forward was to use the main four mosfet bridges to provide clamping action to the transformer primary directly. Two diagonal mosfets turn on in the usual way to enegise the transformer if a positive or negative square wave voltage step is to be developed. For zero volt clamping mode, I turned on both lower mosfets simultaneously which provides an effective low impedance short right across the transformer primary. This all works very well, and it definitely simplifies things a lot. The next step forward was to realise that I really did not need a microprocessor or a dual port ram and all the complexity and extra hardware that goes with that. The whole thing could be simplified with just a very large ROM. I used a 256K x 8 eprom that holds 256 different 1K lookup tables. The lower ten bits just repetitively scroll through all the 1K addresses to produce the mosfet switching pattern that repeats at 50Hz. The eight higher order address bits are switched by an analog to digital converter which is effectively a dc voltmeter. As the dc input voltage to this goes up and down, we can switch between our 256 different stored lookup tables to tweak the inverter output voltage. I used my original microprocessor and its original step sinewave generating software, and added to that an extra routine to directly burn a really big eprom with 256 different lookup tables. I now have that all done, and it works just as well as the old processor except very much faster and with a lot less supporting hardware. The next realization was that I do not really need to have voltage feedback and some kind of slow PID error correcting loop. All that needs to be done is to measure the dc input voltage into the inverter and select the correct lookup table to produce a constant ac output voltage from the inverter. This all now runs amazingly fast. It can correct over a 2:1 input voltage range perfectly within one mains cycle. Pretty pleased with how its all slowly coming together. The analog to digital conversion for the input voltage measurement is rather special, as it averages over the full 20mS, then switches lookup tables right at the zero crossings for a seamless amplitude change, even when compensating for large and sudden input voltage changes. Because it averages over 20mS, its completely immune to 50Hz or 100Hz ripple voltages on the incoming dc line to the inverter, but responds very fast to genuine voltage level changes. The averaging voltmeter is very simple, it uses a voltage to frequency converter that produces a steady frequency with pure dc, or might have rather a lot of frequency modulation if the input is noisy. A counter just counts up every 20mS with the averaged frequency over the measurement period, and the final count selects the appropriate lookup table at every second zero crossing. This too happens very fast, but is amazingly immune to noise and ripple. Very excited about how well it all works so far. The next step will be to build the power stages for four inverters and wind four suitable transformers, probably for about 4Kw to 5Kw. At this point I can monitor the output of all the driver hardware with a lookup table and a multiplying digital to analog converter add on. This simulates how the final four inverters will operate. The lookup table converts the gate drives back into to analog steps. The smallest inverter 3 binary bits, the next one 9 bits, then 27 bits, and finally 81 bits for the big inverter. 81 steps (each step 3 bits) would produce an 0 to 243 bit peak to peak output from the DAC. The multiplying action of the multiplying DAC simulates how a real inverter output amplitude changes with changes in dc input voltage to the inverter. If the dc voltage into a real inverter increases, the output of a multiplying DAC will also increase in exactly the same way. So even with no inverter power stages built yet to test with, I can look at my stepped output waveform of my DAC on a CRO and watch what it does and how the waveform generating hardware compensates for changes in incoming dc battery voltage. Its nearly perfect with less than 1% change in rms output for a 2:1 dc input voltage change. The slightly lumpy output within that 1% variation is due to rounding errors and bit resolution in the software that generated all my lookup tables. But because the output amplitude steps are only about 0.5v this lumpiness goes unnoticed except on an oscilloscope. I don't think I there is much point in trying to do any better than that. Its now a case of putting together the hardware for four inverters and winding four new transformers. All 16 individual gate driver waveforms are there and ready to go. Cheers, Tony. |
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| kanchana Regular Member Joined: 08/05/2018 Location: Sri LankaPosts: 56 |
This is exciting . Perhaps I would build a simpler version with 21 steps first , to drive from dc 230v straight from mains + solar then try to upgrade from there . Will be getting this https://www.ebay.com/itm/291549716177 and a programmer to start with .Going though the schematic trying to understand the logic . M27C512 needs no modification to the hardware as I understand. Regards kanchana |
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| Warpspeed Guru Joined: 09/08/2007 Location: AustraliaPosts: 4406 |
Dc 230v is an excellent first step, because you can use off the shelf transformers with 230 volt primaries which makes getting stated a lot easier. My first effort used a 2K long lookup table, but the current inverter uses only a 1K lookup table. There is no obvious degradation of the final output waveform, and programming an eprom requires only half the work. Cheers, Tony. |
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| kanchana Regular Member Joined: 08/05/2018 Location: Sri LankaPosts: 56 |
I thought of using your EPROM read you posted . I am still bit confused to come of with my own way of calculating EPROM data. How did come up with 1k data? Regards kanchana |
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| Warpspeed Guru Joined: 09/08/2007 Location: AustraliaPosts: 4406 |
I can just give you the data, or explain how to do it. Cheers, Tony. |
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| kanchana Regular Member Joined: 08/05/2018 Location: Sri LankaPosts: 56 |
I would like to learn how to do it first Thanks Regards kanchana |
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| Warpspeed Guru Joined: 09/08/2007 Location: AustraliaPosts: 4406 |
o/k, assuming we have three separate square wave inverters, each driving a transformer, and the secondary voltages of the transformers are arranged to have voltages that go up in the ratios of one, three, and nine with respect to each other. If all three inverters switch together in the same direction, the peak output voltage will be 1+3+9= an output of 13 voltage units. With none of the invertes on, we have zero output voltage. So our stepped waveform with three inverters can have a maximum of 13 steps up (to the positive peak), 13 steps down (to the negative peak) and a zero voltage step in the middle. That gives us 27 possible steps peak to peak. Another way of looking at this is that each inverter has three possible output states, +ve, -ve, and zero. One inverter gives us three states Two inverters 3 x 3 = nine possible states. Three inverters 3 x 3 x 3 = 27 possible states. We will not consider a four inverter system for now, but that would give 81 possible output states. To drive one inverter we need two output bits from our eprom which can be 10, 01, or 00 (for the off state). The 11 state is obviously not allowed. The six bits required to drive three separate inverters will have a unique hex value for each of the 27 steps. If we use only the six lower data bits in our eprom, we can define each step with a hex value. The positive peak (step 27) will be 01 01 01 with all three inverters going positive. The negative peak (step 1) will be 10 10 10 with all three inverters going negative. The middle zero step (step 14) will be 00 00 00 all inverters off. we can create each step from 1 to 27 with a unique data in the eprom as follows: Step, data, hex. 27 01 01 01 15 26 01 01 00 14 25 01 01 10 16 24 01 00 01 11 23 01 00 00 10 22 01 00 10 12 21 01 10 01 19 20 01 10 00 18 19 01 10 10 1A 18 00 01 01 05 17 00 01 00 04 16 00 01 10 06 15 00 00 01 01 14 00 00 00 00 13 00 00 10 02 12 00 10 01 09 11 00 10 00 08 10 00 10 10 0A 9 10 01 01 25 8 10 01 00 24 7 10 01 10 26 6 10 00 01 21 5 10 00 00 20 4 10 00 10 22 3 10 10 01 29 2 10 10 00 28 1 10 10 10 2A If we start out at the zero crossing, the data sequence coming out of the eprom will always begin at 00 and go 01 06 04 05 1A 18 19 12 10 11 16 14 15 at the positive peak. Then come back down again to the zero crossing in reverse order, and continue on down to the negative peak with the sequence, 02 09 08 0A 25 24 26 21 20 22 29 28 and 2A reached at the negative peak. Those will be the only data values stored in the eprom 27 different data values out of a possible 256. That will control the switching of our three inverters to create any of 27 different output voltage steps. We know that the peak will be 13 steps above zero, and to generate an rms output voltage of 230v requires a peak voltage of 325 volts. The smallest inverter should have a secondary output voltage of 325/13 = 25.0 v The second inverter should have a secondary output voltage of 25 x 3 = 75.0v The largest inverter should have a secondary output voltage of 25 x 9 = 225.0v When they all switch on together in the same direction we get 225 + 75 + 25 = 325v And we can generate pretty close to a 230v rms sine wave with a 325v peak using 25v individual sequential steps. That is half of it done..... The other half of the problem is deciding WHEN the steps switch over from one to the next step. That is tricky, because it is what produces the sine wave shape. Our eprom address is being incremented every 20uS if we have a 1K lookup table and 20mS for one complete cycle. So suppose we determine that we are on step 19 and the eprom is putting out constant 1A data because several addresses all have 1A data. We can determine at which address we either step up to step 20 (18 data) or back down to step 18 (05 data) The trick is to pick the closest address that corresponds to the required switching point and make our data block change from 1A's to the next new data at the required point. To do that we need to divide our 1K lookup into four quadrants of 90 degrees each which correspond to 256 ram addresses for each quadrant. We know the amplitude of each step as there are 13 steps up from zero so the first step above zero will be 1/13, or an amplitude of .0769 where peak amplitude equals 1.0 The second step up will be 2/13 or 0.1538 of peak amplitude. The second last step will be 12/13 or 0.923 of peak amplitude. The peak will obviously be at 1.0 peak amplitude. For the first step, we need to calculate the time required to reach .0769 amplitude. To do that we can use an Arcsin (or inverse sign) calculator found here: https://www.rapidtables.com/calc/math/Arcsin_Calculator.html If we plug in .0769 into that, we get 4.4104 degrees to reach that value. Now we know that 90 degrees equals 256 addresses (address 0FF) So 4.4104degrees divided by 90 degrees and multiplied by 256 equals 12.5 address bits. We can round that to 13 which is 0D hex. So after the zero crossing the first thirteen bits will all be data 00 (step14) But from address 0D, we start a string of new data bits that are 01 (step 15) Step two will have an amplitude of 2/13 or .1538 The Arcsin of that is 8.847 degrees 8.847/90*256 = 25.1 bits or 19 hex where we go up another step to data 06 (step 16) Our eprom data now should be addresses 00 to 0D all contain 00 data(step 14) addresses 0E to 19 all contain 06 data (step 15) addresses 1A.... contain 04 data (step 16) A spread sheet is the obvious way to do this if it has an Arcsin function. Otherwise its a pencil and paper job. A 1K lookup table only requires working out the values for one 90 degree quadrant the hard way. The other three quadrants can be derived more easily from that. Cheers, Tony. |
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| johnmc Senior Member  Joined: 21/01/2011 Location: AustraliaPosts: 282 |
Thanks very much for your description . much food for thought. Cheers john johnmc |
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| Warpspeed Guru Joined: 09/08/2007 Location: AustraliaPosts: 4406 |
A 27 step inverter looks fairly lumpy on an oscilloscope, but when you measure the actual total harmonic distortion, its only about 4.5%. Another more important aspect is that although the voltage is going up and down in discrete 25 volt steps, the current in any inductive load will be much closer to a smooth sine wave. And its motors and transformers that object most to a single inverter square wave known jokingly as a "modified sine wave". I ran a 27 step inverter for over a year and it worked perfectly well. At that point I added a fourth really tiny extra inverter, that produced 81 steps peak to peak and 1.0% total harmonic distortion. Not much difference in what the fourth inverter actually did, but it does look much nicer on an oscilloscope with 81 steps. Cheers, Tony. |
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| kanchana Regular Member Joined: 08/05/2018 Location: Sri LankaPosts: 56 |
Thank you Now I can have some thing to work with . I came up with this schematic , how to use new clamping method using the main 4 mosfets? 2018-05-10_180603_TEST.pdf Regards kanchana |
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| Warpspeed Guru Joined: 09/08/2007 Location: AustraliaPosts: 4406 |
First I used some logic gates to develop the four individual bridge drive signals from the two eprom data bits.  These four bridge drive signals then must have some suitable dead time added. I did that using JK flip flops. A logic low instantly resets the flip flop giving fast turn off. But a logic high on the J input does nothing until the next clock edge arrives. The frequency of the dead time clock can be changed to set the required dead time. The advantage of doing it that way is that with one movable link I can change the dead time on all sixteen JK flip flops together. And then there is the inverse opto coupler connection trick which makes simultaneous cross conduction of both upper and lower mosfets all but impossible.   Cheers, Tony. |
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| kanchana Regular Member Joined: 08/05/2018 Location: Sri LankaPosts: 56 |
excellent work . Any significant advantage of changing the dead time often . I believe it should be 1us or larger Regards kanchana |
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| Warpspeed Guru Joined: 09/08/2007 Location: AustraliaPosts: 4406 |
I built all the drive circuitry first, without really thinking through what I wanted to drive with it. Originally I planned on mosfets for the whole thing, but since then I think I will first try some really big IGBT half bridge power blocks that I already have here for the two larger inverters. These are slow, but switching at only 50Hz there is no real need for speed. IGBTs are more suitable for much higher voltage. This will run off thirty lithium cells at around 100v nominal, so IGBTs are borderline. But I have these big 200 amp monsters that I would like to put into something, and I will give them a try first. I expect to have around 1uS to 3uS dead time initially, but we shall see. Cheers, Tony. |
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| kanchana Regular Member Joined: 08/05/2018 Location: Sri LankaPosts: 56 |
understood . I am slowly designing the circuit board. will update Regards kanchana |
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| kanchana Regular Member Joined: 08/05/2018 Location: Sri LankaPosts: 56 |
one clarification what was the under-voltage sensing chip used in your original logic circuit? Regards kanchana |
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| Warpspeed Guru Joined: 09/08/2007 Location: AustraliaPosts: 4406 |
The particular part I used was an 8054HN, but searching the internet for a data sheet for it I came up empty. That makes me think this is probably now a very old and obsolete part. https://www.utsource.net/itm/p/422061.html?utm_source=bing&utm_medium=cpc&utm_campaign=20160414&utm_term=8054HN&utm_cont ent=8054hn Anyhow, its just one of those microprocessor reset chips with an open drain output that pulls a micropocessor reset pin low until the supply voltage rises above 4.2 volts. A very long time ago I bought a very large quantity of those, and continue to use them for various odd things. A more up to date under voltage detector that has a similar function should work perfectly well. Cheers, Tony. |
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